تفاصيل الحجز

ASIC design is a methodology of cost and size reduction of an electronic circuit, product or system through miniaturization and integration of individual components and their functionality into a single element – an Application Specific Integrated Circuit (ASIC). An electronic product commonly consists of many integrated circuits (ICs) which are interconnected together to perform a particular function. For example, a 1980’s smoke detector was built entirely of general-purpose ICs, such as amplifiers, comparators, regulators and discrete components such as resistors and capacitors. Course Objective: To able to convert the RTL code (Verilog/VHDL) to chip (Tape-out) Corse Content and Schedule: • Day1: Introduction • Day2: Basics of STA, Timing paths, FF basic requirements, timing Constraints. • Day3: Synopsys tools design objects, Logic Synthesis, Formal verification, tutorial on Synthesis • Day4: Floor planning, power planning, placement, ICC • Day5: CTS, Routing, Chip finishing • Day6: Complete tutorial (Synthesis, Formal verification, PNR, STA) • Day7: Extraction and STA • Day8: EMIR, Power Estimation Course Prerequisite: The student must have attended the theoretical sessions before the practical / hands on sessions. Also, they should have good knowledge of HDL languages such as VHDL / Verilog.11